The architecture of current computer systems typically includes a Memory Controller Hub (MCH), also known as the “North Bridge,” and an Input/Output Controller Hub (ICH), also known as the “South Bridge,” connected by a hub interface. FIG. 1 illustrates a typical computer architecture according to the prior art. As shown, a processor 100 is coupled to the North Bridge 105. The North Bridge 105 is the controller for a bus that interfaces between the processor 100 and high speed components 110, such as graphics and memory devices.
The South Bridge 125 is the controller for low-speed components 120, such as hard disk drives, Peripheral Component Interface (PCI) devices, a Universal Serial Bus (USB), a Flash Basic Input Output System (BIOS), Ethernet devices, and Communications and Networking Riser (CNR) devices.
The North Bridge 105 transfers and receives data with the South Bridge 125 via a bi-directional hub interface 115. Configuration registers 130 store configuration data for devices connected to the South Bridge 125. For example, the configuration registers 130 can be used to hold information, such as settings for the hard disk drive (e.g., the amount of available space of the disk, the Interrupt Request Queue (IRQ) line used by the disk drive, the speed of the disk drive, etc,),
System Management (SM) applications can be used to monitor the status of several computer systems. Such applications often need to access the configuration registers 130 to determine the configuration settings for the devices on the South Bridge 125. In current systems, the configuration registers 130 are typically accessed only through the North Bridge 105, which then communicates with the configuration registers 130 via the South Bridge 125. Such systems are inefficient because the System Management application cannot directly access the South Bridge 125 (i.e., the South Bridge 125 is accessed only indirectly, through the North Bridge 105). Because the North Bridge 105 is used to access the configuration registers 130 via the South Bridge 125, a separate application program, being executed and using the North Bridge 105, has to be interrupted to transfer the information extracted from the configuration registers 130 to the System Management application. It is inefficient to interrupt an application program to send data to the System Management application.
There are some current systems that allow system management to be done by peripherals acting as PCI masters. However, these solutions require an external PCI bus and the capability for peer-to-peer transactions. These solutions impact PCI traffic and have very limited capability due to the many system level issues involved in allowing an external PCI master to access the relevant address spaces. In other words, an add-in card can wreak havoc on the system and create security issues if it accesses these regions.
Prior systems are therefore inferior because the configuration registers cannot be read by an external device directly connected to the South Bridge 125 (i.e., not through the use of the North Bridge 105) without the additional of an external PCI bus.